Multiplier example

This program multiply two numbers:
<1>     in1                 // Input X
<2>     in2                 // Input Y
<3>     1                   // Def. const: 1
        {                   // store
<4>        (-3)             // X:=in1
<5>        0                // Z:=0
<6>        SUB [-2],(-1)    // X:=X-1
<7>        ADD [-2],(-2)    // Z:=Z+Y
           JNF [-2],-2      // JMP <6> if not <6> carry
        }                   // restore
<8>     OUT [-3]            // output previos Z


Syntax



Pipelineing

The pipelineing is done by the compiler based on the hardware information. Example of program with pipelineing:
<1>     in1                 // Input X
<2>     in2                 // Input Y
<3>     1                   // Def. const: 1
        {                   // store
<4>        (-3)             // X:=in1, no carry
<5>        0                // Z:=0
<6>        SUB [-2],(-1)    // X:=X-1
<7>        ADD [-2],(-2)    // Z:=Z+Y
           JNF [-4],-2      // JMP <6> if not <6> carry
        }                   // restore
<8>     OUT [-5]            // output previos Z


Multiprocessing

Multiple instruction issue is done by placing {, }, labels, jumps and calls at adresses dividable by the number of processors. Example:
<1>     in1                 // Input X
<2>     in2                 // Input Y
<3>     1                   // Def. const: 1
<4>     NOP
        {                   // store
<5>        (-4)             // X:=in1, no carry
<6>        0                // Z:=0
<7>        NOP
<8>        NOP

<9>        SUB [-4],(-2)    // X:=X-1
<10>       ADD [-4],(-3)    // Z:=Z+Y
<11>       NOP
<12>       NOP
           JNF [-4],-4      // JMP <9> if not <9> carry
        }                   // restore
<13>    OUT [-7]            // output previos Z
More instructions issued simultanously increase the performance because most instructions may be issued without dependencies. Delays in control structures makes the cycle time > instruction fetch time. When more instructions are fetched simultanously then only the fetch time limits the speed.



[Asynchronous memory cell]
© 1996-1997, Jens Dyekjær Madsen.
E-Mail address: Jens.Madsen@post3.tele.dk